Method and apparatus for vector processing

A processor includes a first vector processing unit including a first register file and first vector arithmetic logic unit; a second vector processing unit including a second register file and second vector arithmetic logic unit wherein the first register file has a first plurality of cross connecti...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Desai, Vipul Anil, Gurney, David P, Chau, Benson
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!