Method and apparatus for vector processing
A processor includes a first vector processing unit including a first register file and first vector arithmetic logic unit; a second vector processing unit including a second register file and second vector arithmetic logic unit wherein the first register file has a first plurality of cross connecti...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A processor includes a first vector processing unit including a first register file and first vector arithmetic logic unit; a second vector processing unit including a second register file and second vector arithmetic logic unit wherein the first register file has a first plurality of cross connections to the second vector arithmetic logic unit; wherein the second register file as a second plurality of cross connections to the first vector arithmetic logic unit. |
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