System and method for supporting access to multiple I/O hub nodes in a host bridge

System and method for supporting access to multiple I/O hub nodes in a host bridge

Dynamic routing of data to multiple processor complexes. PCI address space is subdivided among a plurality of processor complexes. Translation table entries at each processor complex determine which processor complex is to receive a DMA transfer, thereby enabling routing of DMA data to one I/O hub n...

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Bibliographische Detailangaben
Hauptverfasser: Beukema, Bruce Leroy, Bronson, Timothy Carl, Fuhs, Ronald Edward, Gilda, Glenn David, Bybell, Anthony J, Jackowski, Stefan Peter, Verdoorn, Jr, William Garrett, Williams, Phillip G
Format: Patent
Sprache:eng
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Zusammenfassung:Dynamic routing of data to multiple processor complexes. PCI address space is subdivided among a plurality of processor complexes. Translation table entries at each processor complex determine which processor complex is to receive a DMA transfer, thereby enabling routing of DMA data to one I/O hub node while accessing translation table entries at another I/O hub node. Further, interrupt requests may be dynamically routed to multiple processor complexes.