Data transmission across asynchronous clock domains

In one embodiment of the present invention, a system is provided for use in transmitting data and related control information from a first clock domain to a second clock domain. The system may include a first logic section that may generate respective identification information that may be used to identify respective types of information represented by respective data and related control information. The system may also include memory that may receive and store, at a first clock rate used in the first clock domain, the respective data and related control information. The memory also may store, in association with the respective data and related control information, the respective identification information. The memory may be configured to permit the retrieval, at a second clock rate used in the second clock domain, of the respective data, the respective related control information, and the respective identification information stored in the memory.