Method for forming a passivation layer for air gap formation
a, bab ab ab abDummy features are formed within an interlevel dielectric layer. Passivation layers (and ) are formed by electroless deposition to protect the underlying conductive regions (and ) from being penetrated from the air gaps. In addition, the passivation layers (and ) overhang the underlyi...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Goldberg, Cindy K Filipiak, Stanley Michael Flake, John C Lii, Yeong-Jyh T Smith, Bradley P Solomentsev, Yuri E Sparks, Terry G Strozewski, Kirk J Yu, Kathleen C |
| description | a, bab ab ab abDummy features are formed within an interlevel dielectric layer. Passivation layers (and ) are formed by electroless deposition to protect the underlying conductive regions (and ) from being penetrated from the air gaps. In addition, the passivation layers (and ) overhang the underlying conductive regions (and ), thereby defining dummy features (and ) adjacent the conductive regions (and ). The passivation layers (and ) can be formed without additional patterning steps and help minimize misaligned vias from puncturing air gaps. |
| format | Patent |
| fullrecord | <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_06838354</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>06838354</sourcerecordid><originalsourceid>FETCH-uspatents_grants_068383543</originalsourceid><addsrcrecordid>eNrjZLDxTS3JyE9RSMsvAuHczLx0hUSFgsTi4syyxJLM_DyFnMTKVLCcQmJmkUJ6YgFYHViOh4E1LTGnOJUXSnMzKLi5hjh76JYWFySWpOaVFMenFyWCKAMzC2MLY1MTYyKUAACbvzCO</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for forming a passivation layer for air gap formation</title><source>USPTO Issued Patents</source><creator>Goldberg, Cindy K ; Filipiak, Stanley Michael ; Flake, John C ; Lii, Yeong-Jyh T ; Smith, Bradley P ; Solomentsev, Yuri E ; Sparks, Terry G ; Strozewski, Kirk J ; Yu, Kathleen C</creator><creatorcontrib>Goldberg, Cindy K ; Filipiak, Stanley Michael ; Flake, John C ; Lii, Yeong-Jyh T ; Smith, Bradley P ; Solomentsev, Yuri E ; Sparks, Terry G ; Strozewski, Kirk J ; Yu, Kathleen C ; Freescale Semiconductor, Inc</creatorcontrib><description>a, bab ab ab abDummy features are formed within an interlevel dielectric layer. Passivation layers (and ) are formed by electroless deposition to protect the underlying conductive regions (and ) from being penetrated from the air gaps. In addition, the passivation layers (and ) overhang the underlying conductive regions (and ), thereby defining dummy features (and ) adjacent the conductive regions (and ). The passivation layers (and ) can be formed without additional patterning steps and help minimize misaligned vias from puncturing air gaps.</description><language>eng</language><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6838354$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6838354$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Goldberg, Cindy K</creatorcontrib><creatorcontrib>Filipiak, Stanley Michael</creatorcontrib><creatorcontrib>Flake, John C</creatorcontrib><creatorcontrib>Lii, Yeong-Jyh T</creatorcontrib><creatorcontrib>Smith, Bradley P</creatorcontrib><creatorcontrib>Solomentsev, Yuri E</creatorcontrib><creatorcontrib>Sparks, Terry G</creatorcontrib><creatorcontrib>Strozewski, Kirk J</creatorcontrib><creatorcontrib>Yu, Kathleen C</creatorcontrib><creatorcontrib>Freescale Semiconductor, Inc</creatorcontrib><title>Method for forming a passivation layer for air gap formation</title><description>a, bab ab ab abDummy features are formed within an interlevel dielectric layer. Passivation layers (and ) are formed by electroless deposition to protect the underlying conductive regions (and ) from being penetrated from the air gaps. In addition, the passivation layers (and ) overhang the underlying conductive regions (and ), thereby defining dummy features (and ) adjacent the conductive regions (and ). The passivation layers (and ) can be formed without additional patterning steps and help minimize misaligned vias from puncturing air gaps.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZLDxTS3JyE9RSMsvAuHczLx0hUSFgsTi4syyxJLM_DyFnMTKVLCcQmJmkUJ6YgFYHViOh4E1LTGnOJUXSnMzKLi5hjh76JYWFySWpOaVFMenFyWCKAMzC2MLY1MTYyKUAACbvzCO</recordid><startdate>20050104</startdate><enddate>20050104</enddate><creator>Goldberg, Cindy K</creator><creator>Filipiak, Stanley Michael</creator><creator>Flake, John C</creator><creator>Lii, Yeong-Jyh T</creator><creator>Smith, Bradley P</creator><creator>Solomentsev, Yuri E</creator><creator>Sparks, Terry G</creator><creator>Strozewski, Kirk J</creator><creator>Yu, Kathleen C</creator><scope>EFH</scope></search><sort><creationdate>20050104</creationdate><title>Method for forming a passivation layer for air gap formation</title><author>Goldberg, Cindy K ; Filipiak, Stanley Michael ; Flake, John C ; Lii, Yeong-Jyh T ; Smith, Bradley P ; Solomentsev, Yuri E ; Sparks, Terry G ; Strozewski, Kirk J ; Yu, Kathleen C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_068383543</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Goldberg, Cindy K</creatorcontrib><creatorcontrib>Filipiak, Stanley Michael</creatorcontrib><creatorcontrib>Flake, John C</creatorcontrib><creatorcontrib>Lii, Yeong-Jyh T</creatorcontrib><creatorcontrib>Smith, Bradley P</creatorcontrib><creatorcontrib>Solomentsev, Yuri E</creatorcontrib><creatorcontrib>Sparks, Terry G</creatorcontrib><creatorcontrib>Strozewski, Kirk J</creatorcontrib><creatorcontrib>Yu, Kathleen C</creatorcontrib><creatorcontrib>Freescale Semiconductor, Inc</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Goldberg, Cindy K</au><au>Filipiak, Stanley Michael</au><au>Flake, John C</au><au>Lii, Yeong-Jyh T</au><au>Smith, Bradley P</au><au>Solomentsev, Yuri E</au><au>Sparks, Terry G</au><au>Strozewski, Kirk J</au><au>Yu, Kathleen C</au><aucorp>Freescale Semiconductor, Inc</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for forming a passivation layer for air gap formation</title><date>2005-01-04</date><risdate>2005</risdate><abstract>a, bab ab ab abDummy features are formed within an interlevel dielectric layer. Passivation layers (and ) are formed by electroless deposition to protect the underlying conductive regions (and ) from being penetrated from the air gaps. In addition, the passivation layers (and ) overhang the underlying conductive regions (and ), thereby defining dummy features (and ) adjacent the conductive regions (and ). The passivation layers (and ) can be formed without additional patterning steps and help minimize misaligned vias from puncturing air gaps.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_uspatents_grants_06838354 |
| source | USPTO Issued Patents |
| title | Method for forming a passivation layer for air gap formation |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-29T12%3A37%3A55IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Goldberg,%20Cindy%20K&rft.aucorp=Freescale%20Semiconductor,%20Inc&rft.date=2005-01-04&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E06838354%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |