Method for fabricating a semiconductor chip interconnect

Microelectronic integrated circuit device fabrication technology has focused on techniques and materials to produce smaller and faster devices for higher performance chips. This trend towards miniaturization has led to demand for improved semiconductor integrated circuit (IC) interconnect performance and improved manufacturability, resulting in a shift from conventional Al/SiO interconnect architectures to copper-based metallization in conjunction with low-permitivity dielectrics. Copper metallization reduces interconnect propagation delays, reduces cross-talk, and enables higher interconnect current densities with extended electromigration lifetime. When combined with low-k dielectrics, copper metallization can also decrease the number of metallization levels, resulting in reduced chip manufacturing costs. For instance, the superior electromigration performance and lower resistivity of copper compared to aluminum, permits a reduction in metal stack height that results in reduced signal cross-talk and improved interconnect speed. A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier comprises a dopant selected from the group consisting of platinum, palladium, iridium, rhodium, and time. The barrier can comprises a refractory metal selected from the group consisting of tantalum, tungsten titanium, chromium, and cobalt, and can also comprise a third element selected from the group consisting of carbon, oxygen and nitrogen. The dopant and other barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.