Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process
The present invention relates to an exposure technology and, more particularly, to a technology which is effective if applied to the photolithography process of a semiconductor integrated circuit device. Herein disclosed is an exposure technology for a semiconductor integrated circuit device which h...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | The present invention relates to an exposure technology and, more particularly, to a technology which is effective if applied to the photolithography process of a semiconductor integrated circuit device.
Herein disclosed is an exposure technology for a semiconductor integrated circuit device which has a pattern as fine as that of an exposure wavelength. The technology contemplates to improve the resolution characteristics of the pattern by making use of the mutual interference of exposure luminous fluxes. |
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