Texture engine memory access synchronizer

The present invention relates to performance enhancement and deadlock prevention in a multiple texture pipeline graphics processor. More specifically, the invention relates to a method and apparatus for balancing and synchronizing the memory requests issued by multiple parallel texture pipelines. As polygon textures are processed by a texture engine, a memory request arbitrator ensures that all of the memory requests associated with a portion of a given graphics texture are issued by all texture pipelines before any single texture pipeline may issue a memory request for another portion of a graphics texture. An arbitration mechanism for balancing memory requests issued by parallel texture pipelines in a multiple pipeline texture engine. The mechanism ensures that, as polygon textures are processed by a texture engine, all of the memory requests associated with a portion of a given graphics texture are issued by all texture pipelines before any texture pipeline may issue a memory request for another portion of a graphics texture. Thus, the invention balances graphics texture processing between parallel texture pipelines operating together, thereby improving processing efficiency and preventing deadlock conditions.