Self-describing IP package for enhanced platform based SOC design

The present invention relates to the field of electronic data processing and electronic design automation (EDA). More specifically, the present invention is related to EDA tools and methodologies associated with design of systems on chip (SOC), and their verification. An IP package is formed with at least one of one or more components of an IP block and one or more pointers to locations where the components can be retrieved, and machine readable connectivity descriptions describing how the IP block is to be connected to include the IP block in an integrated circuit. In one embodiment, the connectivity descriptions include physical pin, implemented bus signals, handling of unimplemented bus signals, and mapping descriptions. In various embodiments, the IP package may further include one or more selected ones of customizable attribute, UI choice elements, embedded and/or diagnostic software, test vectors, supplemental generators and verification environment configuration requirement descriptions. The self-describing packaging advantageously enables an EDA tool suite to offer and facilitate selection of the IP block for a SOC design.