Host bridge translating non-coherent packets from non-coherent link to coherent packets on conherent link and vice versa

1. Field of the Invention A computer system is presented which implements a system and method for conveying packets between a coherent processing subsystem and a non-coherent input/output (I/O) subsystem. The processing subsystem includes a first processing node coupled to a second processing node via a coherent communication link. The first processing node includes a host bridge which translates packets moving between the processing subsystem and the I/O subsystem. The I/O subsystem includes an I/O node coupled to the first processing node via a non-coherent communication link. The I/O node may embody one or more I/O functions (e.g., modem, sound card, etc.). The coherent and non-coherent communication links are physically identical. For example, the coherent and non-coherent communication links may have the same electrical interface and the same signal definition. The host bridge translates non-coherent packets from the I/O node to coherent packets, and transmits the coherent packets to the second processing node. The host bridge also translates coherent packets from the second processing node to non-coherent packets, and transmits the non-coherent packets to the I/O node. The coherent and non-coherent packets have identically located command fields. The translating process includes copying the contents of the command field of one packet type to the command field of the other packet type.