Apparatus and method for filling high aspect ratio via holes in electronic substrates

The present invention generally relates to an apparatus and a method for filling holes in a substrate and more particularly, relates to an apparatus and a method for filling holes in electronic substrates that have high aspect ratios of at least 5:1 in a process for forming vias and interconnects. A...

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Bibliographische Detailangaben
Hauptverfasser: Gruber, Peter A, Maurer, Frederic, Romankiw, Lubomyr Taras
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The present invention generally relates to an apparatus and a method for filling holes in a substrate and more particularly, relates to an apparatus and a method for filling holes in electronic substrates that have high aspect ratios of at least 5:1 in a process for forming vias and interconnects. An apparatus and a method for filling high aspect ratio holes in electronic substrates that can be advantageously used for filling holes having aspect ratios larger than 5:1 are disclosed. In the apparatus, a filler plate and a vacuum plate are used in conjunction with a connection means such that a gap is formed between the two plates to accommodate an electronic substrate equipped with high aspect ratio via holes. The filler plate is equipped with an injection slot while the vacuum plate is equipped with a vacuum slot such that when a substrate is sandwiched therein, via holes can be evacuated of air and injected with a liquid simultaneously from a bottom side and a top side of the substrate. The present invention novel apparatus and method allows the filling of via holes that have small diameters, i.e., as small as 10 m, and high aspect ratios, i.e., at least 5:1 to be filled with an electrically conductive material such as a solder or a conductive polymer such that vias or interconnects can be formed in electronic substrates. The present invention apparatus and method can be advantageously used in fabricating substrates for display panels by forming conductive vias and interconnects for placing a voltage potential on pixel display elements formed on the display panels.