Overlap remover manager

The present invention generally relates to the field of integrated circuit design, and particularly to a system and method for providing an overlap manager to reduce timing worsening and avoid ramptime violations in an improved manner when designing an integrated circuit. The present invention is directed to a system and method for providing an overlap remover manager. A method for removing overlaps in a circuit design for an integrated circuit may include initiating an overlap remover manager, wherein the overlap remover manager is suitable for moving cells of an integrated circuit design to remove cell overlaps. A search for critical wires is performed and a determination is made of which violated moves of cells caused at least one critical wire. A determined violated move of the cells is rolled back and the overlap remover manager employed to remove overlaps between rolled back cells.