Semiconductor memory device and method of forming the same
The present invention relates to a semiconductor memory device and a method of forming the same, and more particularly to a static random access memory having unloaded 4 Tr complementary MOS static random access memory cells. In accordance with the present invention, the gate length and the gate ins...
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creator | Iwai, Kiyotaka |
description | The present invention relates to a semiconductor memory device and a method of forming the same, and more particularly to a static random access memory having unloaded 4 Tr complementary MOS static random access memory cells.
In accordance with the present invention, the gate length and the gate insulation film thickness are different between the p-channel MOS field effect transistors serving as the driver gates and the n-channel MOS field effect transistors forming the flip flop. Namely, the p-channel MOS field effect transistors serving as the driver gates have a larger gate length and a smaller gate oxide film thickness than the n-channel MOS field effect transistors forming the flip flop. |
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In accordance with the present invention, the gate length and the gate insulation film thickness are different between the p-channel MOS field effect transistors serving as the driver gates and the n-channel MOS field effect transistors forming the flip flop. Namely, the p-channel MOS field effect transistors serving as the driver gates have a larger gate length and a smaller gate oxide film thickness than the n-channel MOS field effect transistors forming the flip flop.</description><language>eng</language><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6674105$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64037</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6674105$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Iwai, Kiyotaka</creatorcontrib><creatorcontrib>NEC Corporation</creatorcontrib><title>Semiconductor memory device and method of forming the same</title><description>The present invention relates to a semiconductor memory device and a method of forming the same, and more particularly to a static random access memory having unloaded 4 Tr complementary MOS static random access memory cells.
In accordance with the present invention, the gate length and the gate insulation film thickness are different between the p-channel MOS field effect transistors serving as the driver gates and the n-channel MOS field effect transistors forming the flip flop. Namely, the p-channel MOS field effect transistors serving as the driver gates have a larger gate length and a smaller gate oxide film thickness than the n-channel MOS field effect transistors forming the flip flop.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZLAKTs3NTM7PSylNLskvUshNzc0vqlRISS3LTE5VSMxLAYqUZOSnKOSnKaTlF-Vm5qUrlGSkKhQn5qbyMLCmJeYUp_JCaW4GBTfXEGcP3dLigsSS1LyS4vj0okQQZWBmZm5iaGBqTIQSAEanL9M</recordid><startdate>20040106</startdate><enddate>20040106</enddate><creator>Iwai, Kiyotaka</creator><scope>EFH</scope></search><sort><creationdate>20040106</creationdate><title>Semiconductor memory device and method of forming the same</title><author>Iwai, Kiyotaka</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_066741053</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Iwai, Kiyotaka</creatorcontrib><creatorcontrib>NEC Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Iwai, Kiyotaka</au><aucorp>NEC Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor memory device and method of forming the same</title><date>2004-01-06</date><risdate>2004</risdate><abstract>The present invention relates to a semiconductor memory device and a method of forming the same, and more particularly to a static random access memory having unloaded 4 Tr complementary MOS static random access memory cells.
In accordance with the present invention, the gate length and the gate insulation film thickness are different between the p-channel MOS field effect transistors serving as the driver gates and the n-channel MOS field effect transistors forming the flip flop. Namely, the p-channel MOS field effect transistors serving as the driver gates have a larger gate length and a smaller gate oxide film thickness than the n-channel MOS field effect transistors forming the flip flop.</abstract><oa>free_for_read</oa></addata></record> |
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title | Semiconductor memory device and method of forming the same |
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