Semiconductor device and method of manufacturing the same

The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly relates to a memory cell and a method of manufacturing the same employing an element isolation method for embedding an insulating film into a shallow trench formed in a semiconductor substrate, i.e., employing so-called STI (Shallow Trench Isolation) method. In a method of manufacturing a semiconductor device of STI structure, a semiconductor structure in which an insulating material layer is formed on a conductive layer which becomes a gate electrode, is prepared. Etching is conducted to the semiconductor structure to form a trench extending from the insulating material layer into the semiconductor substrate in accordance with a pattern of a resist film (not shown) covering an element region. Then, the insulating material layer is backed off by wet etching or the like and the gate electrode is processed while using the insulating material layer as a mask. As a result, it is possible to make the gate electrode smaller in size than the element region and to form a trench upper portion to be wider than the trench lower portion in the depth direction of the trench, thereby providing a good shape of the insulator embedded in the trench by depositing the insulator.