High-performance laminate for integrated circuit interconnection

The present invention relates generally to the interconnection of integrated circuits and, more particularly, to the substrates on which the integrated circuits are mounted, and even more particularly to laminate combination build-ups for such substrates, and even more particularly to layers comprising large areas of metal as typically used for ground and power planes in such build-ups. A high-performance, integrated circuit interconnection laminate. Power/ground layers in laminates fabricated with open areas to permit out gassing of gases generated during high temperature lamination are located such that they do not lie under/over critical traces on signal layers. This placement of the open areas enables a reduction in cross-talk between signal layers lying on opposite sides of a power/ground layer and a reduction in signal delay.