Semiconductor memory device for variably controlling drivability

The present invention relates to a semiconductor memory device and, more particularly, to a synchronous semiconductor memory device capable of variably controlling drivability of a memory. A semiconductor memory device including an N-bit prefetch unit, a plurality of data output drivers to output data from the N-bit prefetch unit and a control signal generator for generating a plurality of control signals in response to command signals, wherein the plurality of data output drivers are driven by the control signals.