Memory management unit with programmable EDAC descriptors

The present invention is directed to memory management units of a digital processing system, in general, and more particular, to a memory management unit (MMU) which includes programmable descriptors corresponding to segmented portions of physical memory to indicate whether or not each segmented memory portion is protected by error detection and correction (EDAC) codes. A memory management unit (MMU) of a digital processing system operating in a virtual address domain and a physical address domain comprises a memory programmable to store translation mappings between virtual addresses and physical addresses of the processing system. The memory is also programmable to store control codes representative of EDAC protection corresponding to the translation mappings. A method of operating the memory management unit (MMU) comprises the steps of: programming a memory of the MMU with virtual to physical address translation mappings; and programming the memory of the MMU with control codes representative of EDAC protection corresponding to the translation mappings.