MIS transistors with a metal gate and high-k dielectric and method of forming

The invention relates to a method for forming Metal Insulator Silicon transistors and devices obtained thereof. The metal gate and high-k dielectric are introduced using a replacement gate process. A replacement gate process is disclosed comprising the steps of forming a dummy gate stack on a substr...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Henson, Kirklen, Rooyackers, Rita, Vanhaelemeersch, Serge, Badenes, Goncal
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The invention relates to a method for forming Metal Insulator Silicon transistors and devices obtained thereof. The metal gate and high-k dielectric are introduced using a replacement gate process. A replacement gate process is disclosed comprising the steps of forming a dummy gate stack on a substrate, depositing a PMD layer on the substrate and polishing this PMD layer to expose the top surface of the dummy gate stack. The dummy gate stack can be removed selective to the spacers and the PMD layer. SiC is used as spacer or CMP stop layer to improve the uniformity of the PMD CMP step. SiC can also be used as etch stop layer during the etching of the contact holes or during the formation of a T-gate.