Test limits based on position

This invention relates to the field of testing integrated circuits. More particularly the invention relates to a system for determining different failure limits for various electronic characteristics of integrated circuits based on selected subsets of the integrated circuits. A method for testing in...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Madge, Robert J, Sugasawara, Emery, Daasch, W. Robert, McNames, James N, Bockelman, Daniel R, Cota, Kevin
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
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