Local stall/hazard detect in superscalar, pipelined microprocessor to avoid re-read of register file

The invention relates to computers and superscalar, pipelined microprocessors. More particularly, this invention relates to the method and apparatus for improving the performance of pipelined microprocessors. A method and apparatus that utilizes a simplified, localized version ("a local data-dependency stall") of a global data-dependency stall to avoid re-reading of a register file to improve the performance of a pipelined microprocessor. A non-asserted local data-dependency stall indicates that source operand for an instruction is correct. Accordingly, when a global data-dependency stall arrives, the instruction is stalled in a stage without re-reading the register file. Without the simplified, localized version of the global data-dependency stall, the source operand data is not known to be correct and is indeed assumed to be incorrect. Therefore, when the global data-dependency stall arrives, a complete re-computation of the source operand data must be performed, including a re-read of the register file. Likewise, an asserted local data-dependency stall indicates that source operand for an instruction is not correct. Accordingly, the instruction is stalled when the local data-dependency stall is asserted and until the data for the instruction is available. The available data is forwarded directly to the stalled instruction.