Method and apparatus for identifying SRAM cells having weak pull-up PFETs

The present invention relates generally to integrated circuit memory devices and, more particularly, to identifying weak pull-up PFETs contained within a Static Random Access Memory (SRAM) cell. A method for determining the memory cell stability of individual memory cells included within a memory ar...

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Bibliographische Detailangaben
Hauptverfasser: Wong, Robert C, Towler, Fred J
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The present invention relates generally to integrated circuit memory devices and, more particularly, to identifying weak pull-up PFETs contained within a Static Random Access Memory (SRAM) cell. A method for determining the memory cell stability of individual memory cells included within a memory array is disclosed. In an exemplary embodiment, the method includes presetting each memory cell to a first logic state and then applying a gradually increasing, controlled leakage current to a node within each memory cell. The voltage of each of the nodes within each corresponding memory cell is then monitored. Then, for each memory cell within the memory array, the level of leakage current which causes the memory cell to be changed from the first logic state to a second logic state is determined. The level of leakage current which causes the memory cell to be changed from the first logic state to the second logic state corresponds to the threshold voltage of a pull-up PFET within the memory cell.