On-chip detection of clock gitches by examination of consecutive data

This invention relates to integrated circuits ('chips') and more particularly to large scale integrated circuits, particularly application specific integrated circuits which include various processing and data storage means and a system for recovering at least one clock signal (called hereinafter simply 'clock') from input data. One example is a chip which constitutes all or modular part of a communication unit such as a high-speed switch for a packet-based data communication system. Nevertheless, the invention is intended to have a general utility in chips which require high precision clocks. An application specific integrated circuit includes a clock recovery circuit which recovers from an input signal a repetitive sequence of data values wherein no two consecutive values are the same and a recovered clock. An address generator responds to the recovered clock to cause storage of the data values in said memory in a set of locations having addresses generated by the address generator, so that the address generated by the generator increments in response to a repetitive transition in the recovered clock. The existence of a clock glitch is found by reading the data values from the set of locations to determine whether any two consecutive locations contain the same data value.