Mechanism for software register renaming and load speculation in an optimizer

One technique commonly used in program optimization is register renaming, which reduces false dependencies among the instructions, and gives an optimizer greater freedom to reorder instructions. This technique is especially useful in binary translators, emulators, and just-in-time compilers, which preferably preserve the register state at the exit of each basic block. Since register renaming generally requires the translator to insert additional instructions into the code, which copies the renamed register back to its original location, it is preferable to only rename registers when it will improve the performance of the code. Therefore, it is a problem in the art that it is not known when the benefits of renaming registers outweigh the cost. The inventive mechanism operates to optimize program efficiency in a two phase process. In the first phase, the mechanism conducts a dependency analysis on the instructions to determine dependency relationships between the various instructions in an instruction window. The mechanism thereby identifies candidates for register renaming and instruction speculation, and provisionally performs the renaming and speculation operations, while preserving information which is preferably used to reverse these operations in the second phase if it is determined that the operations may be effectively rescheduled. In the second phase, the mechanism determines whether the optimizing operations, renaming and speculation, were beneficial in each case. Each instruction for which the mechanism finds the optimizing operation to be beneficial will generally remain in optimized form. Optimizing operations found not be beneficial are generally reversed by the mechanism. The mechanism thus selectively uses renaming and speculation operations so as to ensure that the benefits preferably outweigh the costs of the operation in each case.