Dynamic addressing mapping to eliminate memory resource contention in a symmetric multiprocessor system

The present invention generally relates to computer systems and, more specifically, to a dynamic address mapping technique of a symmetric multiprocessor system. A dynamic address mapping technique eliminates contention to memory resources of a symmetric multiprocessor system having a plurality of processors arrayed as a processing engine. The technique defines two logical-to-physical address mapping modes that may be simultaneously provided to the processors of the arrayed processing engine to thereby present a single contiguous address space for accessing individual memory locations, as well as memory strings, within the memory resources. These addressing modes include a bank select mode and a stream mode.