Wafer scale encapsulation for integrated flip chip and surface mount technology assembly

1. Technical Field A device and process for applying mixtures of adhesive formulations combined with solder flux such that flip chips may be rapidly encapsulated with such combinations without interfering with subsequent wafer processing steps are provided. Also provided is a wafer stencil designed...

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Bibliographische Detailangaben
Hauptverfasser: Bernier, William E, Pierson, Mark V, Trivedi, Ajit K
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:1. Technical Field A device and process for applying mixtures of adhesive formulations combined with solder flux such that flip chips may be rapidly encapsulated with such combinations without interfering with subsequent wafer processing steps are provided. Also provided is a wafer stencil designed in such a manner that the saw kerf lines separating individual chip dies are protected from coming into contact with the formulation. Extrusion screening using such wafer stencil is also provided.