Linear intrasummed multiple-bit feedback shift register

This invention generally relates to the circuitry which generates periodic pseudo-random numbers. A linear intrasummed multiple-bit feedback shift register is presented which comprises a multi-stage multi-bit feedback shift register and further includes an adder situated before the input to each stage and which is used to modify the shifted signals according to predefined constants. The additional intrastage summing increases the complexity of the feedback function and makes it more difficult to determine the specific structure from a limited stream of output bits, thus increasing the security of the circuit.