Thin film wiring scheme utilizing inter-chip site surface wiring

The present invention generally relates to wiring systems for multi-chip modules and, more particularly, to wiring systems which facilitate repair and engineering changes in multi-chip modules fabricated from a plurality of layers, such as multi-layer ceramic modules and module wiring formed by thin film techniques. A thin film wiring scheme on a substrate. The thin film wiring scheme includes a plurality of chip connection pads at each of a first and second chip site on the substrate, a plurality of directional wiring lines interspersed between the chip connection pads at each of the first and second chip sites, at least one of the directional wiring lines being orthogonal to at least one of the other directional wiring lines at each of the first and second chip sites, and a plurality of chip site interconnection lines connecting directional wiring lines at the first chip site with the directional wiring lines at the second chip site.