Method and structure for retarding high temperature agglomeration of silicides using alloys

The present invention relates to complementary metal oxide semiconductor (CMOS) devices, and more particular to a method of fabricating CMOS devices having at least one metal silicide contact in which high temperature agglomeration of the same, typically caused during source/drain activation, is sub...

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Bibliographische Detailangaben

Hauptverfasser:	Cabral, Jr., Cyril, Carruthers, Roy Arthur, Harper, James McKell Edwin, Kozlowski, Paul Michael, Lavoie, Christian, Newbury, Joseph Scott, Roy, Ronnen Andrew
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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