Circuit for time-sharing of configurable I/O pins

The present invention relates to microprocessors and in particular to a method of time-sharing a microprocessor's configurable I/O pins. A circuit for efficiently time-sharing the output and input configuration of a microprocessor I/O pin. The circuit includes a microprocessor having at least one I/O pin which can be selectively reconfigured for either output or input functions, a pull-up resistor, a dropping resistor and an output device. The pull-up resistor, dropping resistor and output device each have a common electrical connection at a terminal connected to the selected I/O pin. The pull-up resistor also has a terminal connected to the regulated power supply (Vcc) of the circuit. An input device or configuration switch, which is selectable between a first state and a second state, has one terminal connected to the dropping resistor and a second terminal connected to a point of the circuit at ground potential. The selected I/O pin is normally configured as an output pin for controlling the output device. At one or more intervals, as determined by a software program, the selected I/O pin will be reconfigured for input and will read the status of the input device. The input device will have provide a logical condition "1" or a logical condition "0" input status to the selected I/O pin depending on its selectable state of open or closed. The logical "1" or "0" is represented by a voltage level. The interval at which the selected I/O pin will be reconfigured for input is determined by both the type of output device being controlled and the type of input represented by the input device. The pull-up and dropping resistors have a resistance value ratio of 10:1 or greater. The actual resistance values are selected such that the output signal from the selected I/O pin can override the representative voltage levels of the logical conditions "1" or "0" of the input device when the selected I/O pin is configured for output.