Mechanism and display for boundary-scan debugging information

The present invention relates generally to the field of electrical circuit testing, and more particularly, to a method and system for displaying boundary scan debugging information. A graphical user interface for displaying boundary scan test data, and method for producing the same, is presented. The user interface display allows a user to view boundary scan test data from a boundary scan testing device in a format well-suited for debugging. Serial data received from the testing device is organized into a parallel format to display predicted versus actual data values on a per node basis, to show how a node is passing or failing. In a preferred embodiment, the user views the frame cell number in the boundary scan chain, the device cell number within a device at that point of the chain, the device name, the pin of the device associated with the cell, the node associated with the pin, the predicted value for the cell, the actual value for the cell as if differs from the predicted value if it differs, and the cell numbers for drivers that match predicted and actual data. Frame cells can be displayed in numerical or sorted boundary scan chain order, failing status only, or passing status only. The preferred embodiment display has the capability to display interesting correlations in the data to assist the user in debugging the circuit under test, including devices driving at fail, devices receiving at fail, devices driving only passes, devices receiving only passes, nodes always failing, nodes sometimes failing, and nodes always passing.