System and method for concurrent placement of gates and associated wiring

System and method for concurrent placement of gates and associated wiring

1. Field of the Invention A design tool for integrated circuits includes a placement tool which places logic gates and interconnect components concurrently. Probabilistic interconnect models are used to represent the collection of possible interconnect routings that provide acceptable circuit perfor...

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Bibliographische Detailangaben
Hauptverfasser: Pileggi, Lawrence, Sarrafzadeh, Majid, Yeap, Gary K, Taraporevala, Feroze Peshotan, Gao, Tong, Boyle, Douglas B
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:1. Field of the Invention A design tool for integrated circuits includes a placement tool which places logic gates and interconnect components concurrently. Probabilistic interconnect models are used to represent the collection of possible interconnect routings that provide acceptable circuit performance and routing area.