Microprocessor device

1. Field of the Invention The microprocessor device has a central processing unit in which the instructions that are stored in a program memory are converted into arithmetic or logical combinations for controlling the different components of the microprocessor. A data and/or control line bus enables data transfer and access to CPU-internal and/or peripheral-bound special function registers, which are assigned to the central processing unit. A coherent memory block with memory cells of the random access type is assigned to the central processing unit through the data and/or control line bus. The memory block has a dedicated address decoder and bus driver circuit, and has a first, arbitrarily usable and/or accessible memory area and a second, peripheral-independent and directly addressable memory area. The memory block is assigned an enable device which disables or enables the output of data contents from the second memory area onto the data and/or control line bus.