System for protecting output drivers connected to a powered-off load

In a multi-cabinet computer system with on-line serviceability, it is entirely possible for some electronic (circuits) to be powered from the system's power subsystem and for other circuits to be unpowered. This situation can also occur when circuits and/or sub-units of the system receive power supply from different sources. This can cause problems when signals are driven by CMOS circuits to CMOS receiver circuits that are unpowered. A CMOS output driver trying to drive an unpowered CMOS receiver could cause severe damage to the driving transistor due to the essentially short circuit current paths presented by the unpowered circuit. This is illustrated in , showing a driving circuit (Q D, Q D p channel, n-channel, respectively) coupled to a receiving circuit (Q R, Q R p channel, n-channel, respectively) by a conductor . (The circuits Q D, Q D and Q R, Q R may, for example, be carried by a circuit board (not shown) or an integrated circuit on a circuit board.) The driving circuit, Q D, Q D, and receiving circuit, D R, Q R, reside in different power zones and are respectively connected to a different power supply. The receiving circuit is connected to its respective power supply (P.S.) along with other circuits on the board or integrated circuit. If the driving and receiving circuits are CMOS construction, the receiving circuits Q R, Q R will have parasitic diodes D , D formed between their gate leads and their respective drain leads. A system for preventing a powered-up sub-unit from driving a powered-off low-impedance load transitions to a NO_CLOCK state and tri-states output drivers of the sub-unit output unless a clock signal is received from a connected sub-unit. While in the NO_CLOCK state, the sub-unit periodically transmits bursts of clock signals to signal the other sub-unit that it is powered up.