Pulse delay circuit with stable delay

The present invention relates generally to delay circuits and, particularly, to delay circuits that provide a stable delay for a wide range of operating and process conditions. A pulse delay circuit that provides a delay for a pulsed input signal that does not vary significantly under changing temperature, power supply voltage or process conditions. The delay provided by the pulse delay circuit is not significantly limited in duration. The pulse delay circuit includes a pulse detector, an RC delay circuit and a pulsed signal generator. The delay is primarily determined by the RC time constant of the RC delay circuit.