System and method for utilizing a conditional split for aligning internal operation (IOPs) for dispatch

The present invention relates generally to a superscalar processor and more particularly to the decode and routing of internal instructions to an asymetrical dispatch bus (that is not all instructions can be decoded/dispatched/executed for each and every slot) in such a processor. A method and syste...

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Bibliographische Detailangaben

Hauptverfasser:	Derrick, John Edward, Eisen, Lee Evan, Jordan, Paul Joseph, Hay, Robert William
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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