ASIC routability improvement

A method and system for improving ASIC routability is disclosed. In a first aspect of the present invention, the method and system include performing an initial cell placement process on an ASIC design; performing a global routing process and creating global routing data, including congestion data;...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Kendrick, Floyd, Imper, James, Billenstein, Matt
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A method and system for improving ASIC routability is disclosed. In a first aspect of the present invention, the method and system include performing an initial cell placement process on an ASIC design; performing a global routing process and creating global routing data, including congestion data; and repeating the initial cell placement process using the congestion data as input, such that cell and routing density in the ASIC design is reduced, thereby reducing routing congestion. In a second aspect of the present invention, the method and system further include performing a placement refinement and buffer insertion process; performing a repeater removal process that uses the congestion data as input and removes buffers from the congested areas; and repeating the placement refinement process, such that global nets are routed around the congested areas.