Interleaving/deinterleaving method and apparatus

Conventionally, when interleaving/deinterleaving was carried out in bit units, complicated logical operation processing was required, thereby causing a problem of increasing the size of the circuit and the number of processing steps. In the present invention, address information and bit position inf...

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Bibliographische Detailangaben
1. Verfasser: Tanoue, Kazufumi
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Conventionally, when interleaving/deinterleaving was carried out in bit units, complicated logical operation processing was required, thereby causing a problem of increasing the size of the circuit and the number of processing steps. In the present invention, address information and bit position information output from access information supply means are determined in accordance with the arrangement of data elements obtained after interleaving/deinterleaving. From the address, corresponding to the address information from the access information supply means, of data storage means, 1-word data is read, and the data element in the bit position designated by the bit position information from the access information supply means is selected and output. The bit sequence obtained by the above-mentioned continuous processing has already become a data sequence obtained after interleaving/deinterleaving. It is thus possible to avoid complicated logical operation processing and to reduce the size of the circuit and the number of processing steps.