Method for fabricating a semiconductor structure

The present invention provides a method for fabricating a semiconductor structure having the steps of: providing a semiconductor substrate ( 10 ); providing a plurality of trenches (G 11 , G 12 ; G 21 ) in the semiconductor substrate ( 10 ) using a first hard mask ( 50 ), which trenches are arranged offset with respect to one another in rows (r 1 , r 2 ) and columns (s 1 , s 2 , s 3 ); causing the hard mask ( 50 ) to recede by a predetermined distance ( ) with respect to the trench wall at the top side (OS) of the semiconductor substrate ( 10 ) for the purpose of forming a first hard mask ( 50 ′) that has been caused to recede; providing an isolation trench structure (ST) in the semiconductor substrate ( 10 ) using a second hard mask (HM), the isolation trench structure (ST) subdividing the first first [sic] hard mask ( 50 ′) that has been caused to recede along the rows (r 1 , r 2 ) into strip sections ( 50 1 ′, 50 2 ′; 50 3 ′) and the strip sections ( 50 1 ′; 50 3 ′) of adjacent rows (r 1 , r 2 ) being arranged offset with respect to one another; the receding process resulting in a reduction of an overlap region (KB′) between two strip sections ( 50 3 ′; 50 3 ′) of adjacent rows (r 1 , r 2 ) in comparison with an overlap region (KB) which would be present without the receding process; removing the second hard mask (HM); and filling and planarizing the isolation trench structure (ST) with a filling material (FI) using the first hard mask ( 50 ′) subdivided into the strip sections ( 50 1 ′, 50 2 ′; 50 3 ′).