Terminating resistor driver for high speed data communication

A method and structure for a driver circuit having a plurality of parallel resistors, where a total impedance of all the resistors equals an impedance of an associated transmission line and a switch adapted to combine the resistors to control an output level of the driver. The driver circuit's switch selectively connects the resistors to either a voltage high signal or a voltage low signal. The first set of the switches connect a voltage high signal to a first resistor of the resistors and a second set of switches connect a voltage low signal to a second resistor of the resistors. The switch has a matched pair of opposite type transistors. The driver circuit has balancing resistors connected to the switch, the balancing resistors are sized to balance the resistance within the driver circuit. The resistors are the balancing resistors and the drivers are connected to the switches.