Low-bias bottom electrode etch for patterning ferroelectric memory elements

One aspect of the invention relates to a method of manufacturing FeRAM, and in particular, plasma etching a bottom electrode layer in a ferroelectric capacitor stack. According to the method, plasma etching is carried out at a relatively low bias in an atmosphere that includes a halogen compound and an oxygen source containing carbon, such as carbon monoxide or carbon dioxide. The invention prevents shorting along the sidewalls of the capacitor stack, which can otherwise be caused by re-deposition of material released from the bottom electrode layer. The gas composition and temperature are such that chemical reaction substantially contributes to the etch rate as compared to purely physical etching. In one embodiment, the capacitor stack is etched with a hard mask that include TiAlN and the atmosphere is oxidizing to an extent that increases the selectivity between the hard mask and the bottom electrode layer.