Maintaining processor execution during frequency transitioning
An embodiment of the present invention includes a standby clock generator and a selector. The standby clock generator generates a standby clock synchronous to a core clock. The core clock is generated by a core clock generator during a normal operation mode. The core clock generator stops the core c...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | An embodiment of the present invention includes a standby clock generator and a selector. The standby clock generator generates a standby clock synchronous to a core clock. The core clock is generated by a core clock generator during a normal operation mode. The core clock generator stops the core clock during a frequency transition. The selector generates a processor clock from the standby clock during the frequency transition from the normal operation mode according to a selector control signal. |
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