Method and apparatus for controlling power states in a memory device utilizing state information

A method of controlling power states in a memory device includes determining if a power-down command is issued. A first lower power state is entered if the power-down command is issued and the memory device is in a first state. A second lower power state is entered if the power-down command is issued and if the memory device is in a second state. The second lower power state is lower than the first lower power state. The memory device remains in a normal operation power state if the power-down command is not issued.