Inverter output circuit

An inverter output circuit comprises first though third inverters connected in series. The low-potential output of the first inverter has an offset level. The input threshold voltage of the second inverter is set up at a lower level than the low-level offset potential of the first inverter as the le...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Yokoi, Shizuka
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:An inverter output circuit comprises first though third inverters connected in series. The low-potential output of the first inverter has an offset level. The input threshold voltage of the second inverter is set up at a lower level than the low-level offset potential of the first inverter as the level of supply voltage Vdd falls below a predetermined reference level. Thus, the third inverter is fixed to a predetermined condition if the supply voltage drops below the reference voltage, thereby preventing erratic operations of a load connected to the inverter output circuit caused by, for example, a power shut down and a brownout.