MEMS wafer level package
An improved wafer level encapsulated micro-electromechanical device fabricated on a semiconductor wafer and a method of manufacture using state-of-the-art wafer fabrication and packaging technology. The device is contained within a hermetic cavity produced by bonding a silicon wafer with active circ...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | An improved wafer level encapsulated micro-electromechanical device fabricated on a semiconductor wafer and a method of manufacture using state-of-the-art wafer fabrication and packaging technology. The device is contained within a hermetic cavity produced by bonding a silicon wafer with active circuits to an etched silicon wafer having cavities which surround each device, and bonding the two wafer by either thin film glass seal or by solder seal. The etched wafer and thin film sealing allow conductors to be kept to a minimum length and matched for improved electrical control of the circuit. Further, the device has capability for a ground ring in the solder sealed device. The devices may be packaged in plastic packages with wire bond technology or may be solder connected to an area array solder connected package. |
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