Photomask and integrated circuit manufactured by automatically eliminating design rule violations during construction of a mask layout block
A photomask and integrated circuit manufactured by eliminating design rule violations during construction of a mask layout block are disclosed. A photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Oren, Micha Rittman, Dan |
description | A photomask and integrated circuit manufactured by eliminating design rule violations during construction of a mask layout block are disclosed. A photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a selected position for a polygon in a mask layout block, identifying a design rule violation in the mask layout block if the selected position is less than a design rule from a technology file, and automatically preventing the polygon from being placed in the mask layout block at the selected position if the design rule violation is identified. |
format | Patent |
fullrecord | <record><control><sourceid>uspatents_EFI</sourceid><recordid>TN_cdi_uspatents_applications_20020166109</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>20020166109</sourcerecordid><originalsourceid>FETCH-uspatents_applications_200201661093</originalsourceid><addsrcrecordid>eNqVjjEOwjAMRbswIOAOXhmQ0iIhMSMQIwN75SZpieomVWIj9Q4cmrTiAkz-fv763-vi83gFDgOmHtAbcJ5tF5GtAe2iFscwoJcWNUvMsJkAZfaz00g0gSU3OJ9X34GxyXUeopCFtwuUafAJjMT5qrPmKHqGEFpAWFoJpyAMDQXdb4tVi5Ts7jc3xf52fV7uB0lj_slzqnEcKVcvyXWlVKXK06lU5-M_3i-zOVY5</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Photomask and integrated circuit manufactured by automatically eliminating design rule violations during construction of a mask layout block</title><source>USPTO Published Applications</source><creator>Oren, Micha ; Rittman, Dan</creator><creatorcontrib>Oren, Micha ; Rittman, Dan</creatorcontrib><description>A photomask and integrated circuit manufactured by eliminating design rule violations during construction of a mask layout block are disclosed. A photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a selected position for a polygon in a mask layout block, identifying a design rule violation in the mask layout block if the selected position is less than a design rule from a technology file, and automatically preventing the polygon from being placed in the mask layout block at the selected position if the design rule violation is identified.</description><language>eng</language><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020166109$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,869,881,64035</link.rule.ids><linktorsrc>$$Uhttps://patentcenter.uspto.gov/applications/10180865$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Oren, Micha</creatorcontrib><creatorcontrib>Rittman, Dan</creatorcontrib><title>Photomask and integrated circuit manufactured by automatically eliminating design rule violations during construction of a mask layout block</title><description>A photomask and integrated circuit manufactured by eliminating design rule violations during construction of a mask layout block are disclosed. A photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a selected position for a polygon in a mask layout block, identifying a design rule violation in the mask layout block if the selected position is less than a design rule from a technology file, and automatically preventing the polygon from being placed in the mask layout block at the selected position if the design rule violation is identified.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EFI</sourceid><recordid>eNqVjjEOwjAMRbswIOAOXhmQ0iIhMSMQIwN75SZpieomVWIj9Q4cmrTiAkz-fv763-vi83gFDgOmHtAbcJ5tF5GtAe2iFscwoJcWNUvMsJkAZfaz00g0gSU3OJ9X34GxyXUeopCFtwuUafAJjMT5qrPmKHqGEFpAWFoJpyAMDQXdb4tVi5Ts7jc3xf52fV7uB0lj_slzqnEcKVcvyXWlVKXK06lU5-M_3i-zOVY5</recordid><startdate>20021107</startdate><enddate>20021107</enddate><creator>Oren, Micha</creator><creator>Rittman, Dan</creator><scope>EFI</scope></search><sort><creationdate>20021107</creationdate><title>Photomask and integrated circuit manufactured by automatically eliminating design rule violations during construction of a mask layout block</title><author>Oren, Micha ; Rittman, Dan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_applications_200201661093</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Oren, Micha</creatorcontrib><creatorcontrib>Rittman, Dan</creatorcontrib><collection>USPTO Published Applications</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Oren, Micha</au><au>Rittman, Dan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Photomask and integrated circuit manufactured by automatically eliminating design rule violations during construction of a mask layout block</title><date>2002-11-07</date><risdate>2002</risdate><abstract>A photomask and integrated circuit manufactured by eliminating design rule violations during construction of a mask layout block are disclosed. A photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a selected position for a polygon in a mask layout block, identifying a design rule violation in the mask layout block if the selected position is less than a design rule from a technology file, and automatically preventing the polygon from being placed in the mask layout block at the selected position if the design rule violation is identified.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_uspatents_applications_20020166109 |
source | USPTO Published Applications |
title | Photomask and integrated circuit manufactured by automatically eliminating design rule violations during construction of a mask layout block |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-25T06%3A57%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFI&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Oren,%20Micha&rft.date=2002-11-07&rft_id=info:doi/&rft_dat=%3Cuspatents_EFI%3E20020166109%3C/uspatents_EFI%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |