MRAM architecture and system

A magnetoresistive memory fabricated on a common substrate. The memory including first and second spaced apart magnetoresistive memory arrays each including a plurality of MTJ memory cells arranged in rows and columns and a plurality of word/digit lines associated with the rows of magnetoresistive memory cells of each of the arrays. Switching circuitry is positioned on the substrate between the first and second arrays and designed to select a word/digit line in one of the first and second arrays. A current source is positioned on the substrate adjacent and coupled to the switching circuitry for supplying programming current to the selected word/digit line.