Resetting circuit and semiconductor device having the same

A resetting circuit includes first and second transistors that respectively receive first and second voltages through gates. The ratio W/L of the second transistor is larger than that of the first transistor. The first and second voltages rise in accordance with the rise of a supply voltage. The second voltage is lower than the first voltage. Since an increase in the current IDS of the first transistor is greater than an increase in the current IDS of the second transistor, an inversion occurs between the current IDSs of the first and second transistors by applying a predetermined supply voltage. Since a reset signal is generated when the values of the currents IDS of the first and second transistors cross, the reset signal can always be generated by the predetermined supply voltage, independent from the threshold voltage of the transistor.