Nickel-silicide process for ultra-thin-body SOI-MOSFETs
A self-aligned nickel-silicide process to reduce parasitic source and drain resistances in ultra-thin-body silicon-on-insulator (UTB-SOI)-MOSFETs is investigated. An optimized nickel-silicide process sequence including nickel sputter deposition, rapid thermal diffusion and compatible silicon nitride...
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Veröffentlicht in: | Microelectronic engineering 2005-12, Vol.82 (3), p.497-502 |
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Hauptverfasser: | , , , , , , , , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A self-aligned nickel-silicide process to reduce parasitic source and drain resistances in ultra-thin-body silicon-on-insulator (UTB-SOI)-MOSFETs is investigated. An optimized nickel-silicide process sequence including nickel sputter deposition, rapid thermal diffusion and compatible silicon nitride (Si
3N
4) spacers is demonstrated in UTB-SOI
n-MOSFETs. Transistor on-currents and source/drain-resistivity are extracted from output and transfer characteristics and compared for various device layer thicknesses from 80
nm down to 15
nm. On-currents are improved up to a factor of 100 for the thinnest transistors by the introduction of self-aligned NiSi. Front and back gate interface qualities are extracted to evaluate their potential impact on mobility and on-currents specifically for ultra-thin devices. |
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ISSN: | 0167-9317 1873-5568 1873-5568 |
DOI: | 10.1016/j.mee.2005.07.049 |