Machine learning algorithm partially reconfigured on FPGA for an image edge detection system

Unmanned aerial vehicles (UAVs) have been widely used in military, medical, wireless communications, aerial surveillance, etc. One key topic involving UAVs is pose estimation in autonomous navigation. A standard procedure for this process is to combine inertial navigation system sensor information with the global navigation satellite system (GNSS) signal. However, some factors can interfere with the GNSS signal, such as ionospheric scintillation, jamming, or spoofing. One alternative method to avoid using the GNSS signal is to apply an image processing approach by matching UAV images with georeferenced images. But a high effort is required for image edge extraction. In this paper, a support vector regression (SVR) model is proposed to reduce this computational load and processing time. The dynamic partial reconfiguration (DPR) of part of the SVR datapath is implemented to accelerate the process, reduce the area, and analyze its granularity by increasing the grain size of the reconfigurable region. Results show that the implementation in hardware is 68 times faster than that in software. This architecture with DPR also facilitates the low power consumption of 4 ​mW, leading to a reduction of 57% than that without DPR. This is also the lowest power consumption in current machine learning hardware implementations. Besides, the circuitry area is 41 times smaller. SVR with Gaussian kernel shows a success rate of 99.18% and minimum square error of 0.0146 for testing with the planning trajectory. This system is useful for adaptive applications where the user/designer can modify/reconfigure the hardware layout during its application, thus contributing to lower power consumption, smaller hardware area, and shorter execution time.