An analysis of interface trap charges to improve the reliability of a charge-plasma-based nanotube tunnel FET

A new heterodielectric shifted-core-gate nanotube tunneling field-effect transistor (HD-SCG-NT-TFET) is proposed with a higher ON-state current and a better subthreshold swing (SS) compared with the conventional core-gate NT-TFET structure. The charge plasma phenomenon is employed to induce charge carriers inside the channel and source region by applying an appropriate metal workfunction. A brief comparative analysis of the influence of the high- K gate dielectric on the interface trap charges (ITCs) and the resulting effect on the performance of the nanotube structures is also presented for different direct-current (DC) parameters. A reliability analysis for the nanotube TFET is presented for the first time to test how efficiently the proposed device follows the original characteristics. To address reliability concerns for low-power applications, the nanotube TFET structures are investigated in terms of their I ON , I OFF , subthreshold swing (SS), and I ON / I OFF ratio. All of the analyses are performed in the presence of negative, neutral, and positive ITCs.